Advanced semiconductor fabrication processes include utilization of multiple patterning techniques, for example, litho-etch-litho-etch (LELE) with double photomasks/lithomasks (mask) where each mask may be used to pattern half of the target pitch, self-aligned double-patterning (SADP) or self-aligned quadruple-patterning (SAQP). However, variations in a multiple patterning process can affect results of the reproduced pattern where, for example, some features of the pattern may be formed or placed inaccurately when compared to the original target pattern. Variations in spacing between elements, termed “pitch-walking,” may be triggered by multiple root causes such as litho offsets, spacer deposition uniformity, etch bias, or the combination thereof, which impacts features (e.g., mandrels, spacers, etc.) used in forming elements (e.g. silicon (Si) fins) of an integrated circuit.
FIG. 1A illustrates an example SAQP process for forming fin features in a substrate. Mandrels 101 and first spacers 103 formed on opposite sides thereof may be formed on an upper surface of a substrate 105. Next, the mandrels may be removed, second spacers 107 may be formed at opposite sides of the first spacers, and then the first spacers may be removed. The fin features are formed by removing sections of the substrate in the spaces between second spacers 107. As noted, errors in placement and/or a size of any of these features can produce a pitch-walking error affecting the final formed elements. FIG. 1A illustrates spaces “α”, “β”, and “γ”, which have substantially the same size, α=β=γ, resulting in no pitch-walking.
In contrast, FIGS. 1B and 1C illustrate instances of pitch-walking. In FIG. 1B, α′≠β≠γ′ resulting in a pitch-walking error where α′ is greater than β and γ′, and β is greater than γ′. The resulting pitch-walking error can be contributed to different size mandrels 101a when compared to the mandrels 101 in FIG. 1A. Although elements (e.g. Si-fins) formed by the second spacers 107 may have the same size, some elements formed by second spacers 107a will have a smaller spacing, γ′, resulting in a non-uniform spacing between the adjacent elements. Additionally, the space, α′, between the two adjacent mandrels 101 is greater than that of in FIG. 1A resulting in a non-uniform spacing between elements corresponding to the adjacent mandrels.
FIG. 1C illustrates another example where α′≠β′≠γ resulting in a pitch-walking error where α′ is greater than β′ and γ, and γ is greater than β′. The resulting pitch-walking error can be contributed to different size dummy-spacers 103a when compared to those in FIGS. 1A and 1B. Again, although the elements (e.g. Si-fins) formed by the first-spacers 107 may have the same size, some adjacent elements that may be formed by first-spacers 107b will have a smaller spacing, β′, resulting in non-uniform spacing between the adjacent elements. Similar to FIG. 1B, the space, α′, between the two adjacent mandrels is greater than that of in FIG. 1A resulting in a non-uniform spacing between elements corresponding to the adjacent mandrels.
As a process error, pitch-walking is detrimental to subsequent processes (e.g. patterning) utilized in fabrication of IC devices and various metrology techniques may be utilized to identify and measure variations/errors for adjusting the related processes. However, the current metrology techniques may be inefficient (e.g. slow) and/or may require a combination of different techniques (e.g. hybrid) to accurately identify and measure CDs of features produced by complex multi patterning processes.
Therefore, a need exists for enabling accurate in-line identification, isolation, and measurement of features produced by multi patterning processes and the resulting apparatus.